Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Microchip Technology/ATSAME51J19A/RAMECC/INTENCLR#0x0
Interrupt Enable Clear
Single Bit ECC Error Interrupt Enable Clear
Dual Bit ECC Error Interrupt Enable Clear
https://github.com/cmsis-svd/cmsis-svd-data